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DSP Programming

Hands-On DSP Programming, Testing and Debugging Workshop
October 13-14, 2004
Vancouver, BC

Detailed Program

Wednesday, October 13th, 2004

09:00 – 11:00

John Evora, Texas Instruments

·         Texas Instruments DSP Platforms

·         DSK Block Diagram 

·        C55X High-Level Architecture Overview

11:00 – 13:00

 
Tareq Shahwan, Texas Instruments

·       C5510 Device Overview

·       Reset and Bootload Options

·       C55xx Code Optimization Techniques and Hints 

·       C55xx Pipeline

·       Dual MAC Instruction and Some Application Specific Instructions

·       C55xx Addressing Modes

·       C55xx Specific Power Conservation Methods

·       C5510 Memory Map 

·       TI CCS Tools

13:00 - 14:00

Lunch Break

14:00 – 18:00

 

Michael Tsiroulnikov, MIKET DSP Solutions

·        Efficient Programming Techniques with TI C55x emphasis

a. introduction

b. processor highlights

        - dual MAC

        - 3 data ptrs

        - program cache

        - zero overhead nested loops

        - DARAM

c. multi-rate signal processing - intro

        - subsampling limits

        - complex domain vs. real domain sampling

d. realizing a generic filterbank

e. data structures

f. C and ASM code

g. example of MFR.1/2

        - fixed-spaced freqs

        - limited energy range

h. input, energy and freq estimation

i. other applications

        - DTMF

        - call progress

        - matched filters

        - adaptive subband processing

        - etc

j. conclusion

Thursday, October 14th, 2004

09:00 – 12:00

 

Michael Tsiroulnikov, MIKET DSP Solutions

·        Methods of Efficient Testing and Debugging DSP   Programs

a. introduction

b. DSP programming as a multi-step procedure

    MATLAB -> Floating point C -> fixed point C >

    fixed point DSP C -> ASM

c. data structures, test oriented. No stack variables.

d. C/ASM function call conventions

e. program flow structuring, logic -> C, SP -> asm

g. divide & conquer. function size.

h. fixed point digital filter design potential flaws

        - FIR vs. IIR

        - min phase (polystab) FIR implementation of IIR

        - arbitrary waveform saturation test

        - etc

i. what is not possible to test

        - but what shall not be forgotten or overlooked

j. test case building

        - large signal,

        - max strength signal,

        - saturation,

        - stalling effect,

        - rounding,

        - pointer justification,

        - memory trash,

        - ! no interrupt/pipeline testing

l. conclusion

 

12:00 - 13:00

Lunch Break

13:00 – 18:00

 

Michael Tsiroulnikov, MIKET DSP Solutions

·        Hands-on DSP Programming and Code Debugging
(using TI C5510 Board)